We are delighted to partner with SiliconPro to bring over 100 years of combined expertise of developing complex ASICs and their specialist IPs for Forward Error Correction to our partners.
Forward Error Correction (FEC) – IP Core
Forward-error correction (FEC) improves system capacity by permitting high data rates within the communications link while providing improved transmission power efficiency. Reed-Solomon and Turbo Coded are two examples of FECs.
SiliconPro developed a series of very strong FECs based on Low Density Parity Check (LDPC) algorithms. LDPC codes, were first proposed by Robert Gallager in his 1960 doctoral dissertation. These LDPC codes have resulted in FEC solutions that extremely powerful. However, the effective ASIC implementation of the LDPC Decoder and Encoder was a big challenge and a crucial issue in determining how well the attractive merits of LDPC codes can be exploited in real applications.
SiliconPro tackled many of these ASIC architectural challenges and introduced a series of FECs based on Low Density Parity Check (LDPC) algorithms.
- SP2100: Wimax
- SP2200: DVB
- SP2300: WiFi
- SP2400:OTU III
- SP2500:OTU IV
Reed Solomon is a classic FEC, which is used in many communications standard. SiliconPro claim to have the smallest RS core available.
- SP2900: Reed Solomon FEC
Example based on SP2100: Wimax IP Core
LDPC is a very powerful forward error correction (FEC) technology, based on the concept of belief propagation. It utilizes the modem’s best guess (soft decision) of the received data; calculates the probability of the data bits being correct, given the directly connected bits (in the parity check matrix), then expands the probability calculation to include more data bits over few iterations to reach a final decision. LDPC is well known for its decoding gain power, reaching 1 db from the theoretical Shannon limit. The figure Fig.1 below shows the performance of the SP2200.